In order to minimize the space required by display devices, research into the development of various flat panel display devices such as LCD display devices, plasma display panels (PDP) and electro-luminescence displays (EL), has been undertaken to displace larger cathode-ray tube displays (CRT) as the most commonly used display devices. Particularly, in the case of LCD devices, liquid crystal technology has been explored because the optical characteristics of liquid crystal material can be controlled in response to changes in electric fields applied thereto. As will be understood by those skilled in the art, a thin film transistor liquid crystal display (TFT-LCD) device typically uses a thin film transistor as a switching device and the electrical-optical effect of liquid crystal molecules to display data visually.
At present, the dominant methods for fabricating LCD devices and panels are typically methods based on amorphous silicon (a-Si) thin-film transistor technologies. Using these technologies, high quality image displays of substantial size can be fabricated using low temperature processes. As will be understood by those skilled in the art, conventional LCD devices typically include a transparent (e.g., glass) substrate with an array of thin-film transistors thereon, pixel electrodes, orthogonal gate and data lines, a color filter substrate and liquid crystal material between the transparent substrate and the color filter substrate. The use of a-Si TFT technology typically also requires the use of separate peripheral integrated circuitry to drive the gates and sources (i.e., data inputs) of the TFTs in the array. In particular, gate driving signals from a gate driving integrated circuit are typically transmitted to the gate electrodes of TFTs in respective rows and data driving signals from a data driving integrated circuit are typically transmitted to the source electrodes of TFTs in respective columns. A display is typically comprised of a TFT substrate in which a plurality of liquid crystal pixels are formed. Each pixel typically has at least one TFT and a pixel electrode coupled to the drain of the respective TFT. Accordingly, the application of a gate driving signal to the gate of a TFT will electrically connect the pixel electrode of a respective TFT to the data line connected thereto.
TFTs which contain polycrystalline silicon active layers have also been considered to obtain greater carrier mobility and improve on-state current characteristics by reducing leakage currents. However, in order to form a polysilicon-based TFT-LCD having large area, more improved leakage current characteristics are necessary to facilitate increased contrast. Laser crystallization techniques may also be needed to convert amorphous silicon active layers to polycrystalline silicon active layers.
As will be understood by those skilled in the art, strong electric fields located adjacent the drain regions of TFTs typically result in high leakage currents. In order to suppress the magnitudes of these electric fields, offset gate structures, lightly doped drain (LDD) structures and multi-gate structures have been proposed. In the case of the offset gate structure or the LDD structure, steps should typically be performed to insure self-alignment of regions in order to minimize deterioration of image quality by parasitic capacitance. A conventional method of forming polysilicon-based TFT-LCD devices is described in a technical report by M. Sato, entitled "Low-Temperature TFT-LCD Manufacturing Process by Annealing and Ion Implantation", AKT News Excerpt AKT-96-61 from LCD Intelligence, Applied Komatsu Technology, Inc., July (1996). As described in this report, on-state leakage currents in TFTs may be reduced by using LDD regions. However, the addition of LDD regions typically requires the use of additional masks and increases the complexity and cost of fabricating TFT-LCD devices. Also, if misalignment in the LDD ion implantation mask is present, the length of the LDD regions formed at opposite ends of a TFT's channel region may be different.
The optimum length of the LDD regions in a TFT device is typically about 1.0 .mu.m-1.2 .mu.m when the device is operated at room temperature, however, when the device is operated at a temperature of about 70.about.85.degree. C., the optimum length of the LDD regions is typically about 1.5 .mu.m-2.0 .mu.m. Referring now to FIGS. 1-3, graphs are provided which illustrated off-state current (I.sub.off) versus length of an LDD region of a thin-film transistor, at various temperatures and drain-to-source voltages (5, 10 and 15 volts). Reference numerals A.sub.1 -A.sub.3 in FIGS. 1-3 represent graphs of I.sub.off versus length for device operated at 20.degree. C., reference numerals B.sub.1 -B.sub.3 in FIGS. 1-3 represent graphs of I.sub.off versus length for device operated at 50.degree. C., reference numerals C.sub.1 -C.sub.3 in FIGS. 1-3 represent graphs of I.sub.off versus length for device operated at 60.degree. C., reference numerals D.sub.1 -D.sub.3 in FIGS. 1-3 represent graphs of I.sub.off versus length for device operated at 85.degree. C. and reference numerals E.sub.1 -E.sub.3 in FIGS. 1-3 represent graphs of I.sub.off versus length for device operated at 100.degree. C.
As illustrated by FIGS. 1-3, the off-state current I.sub.off is low and relatively stable over the whole temperature range when the length of the LDD region is 1.5 .mu.m or greater. However, as will be understood by those skilled in the art, on-state current in a TFT also decreases as the length of the LDD region increases beyond 2.0 .mu.m. Thus, there is a tradeoff associated with increasing LDD length to decrease leakage currents and decreasing LDD length to increase on-state current.
Thus, notwithstanding prior art methods of forming TFT-LCD devices, there continues to be a need for improved methods of forming TFT-LCD devices having reduced off-state leakage currents and less dependence on photolithographic alignment accuracy, and methods which require a reduced number of masking steps.